The main difference compared to the Z80 was the expansion of the register set to 16-bits, which could be used as 8-bit registers when running "classic" Z80 code. True 16-bit operations were added, but it seems it was expected that most instructions would remain 8-bit, and there was no special mode needed to mix the two.
The address bus was likewise expanded to address more memory, internally supporing addresses of up to 24-bits. The chip was offered with either a 19-bit external bus for 512kB RAM, or a full 24-bit bus for 16MB RAM, the only advantage to the smaller bus was a smaller 40-pin package. Like the Z80 before it, the Z800 retained the internal DRAM controller and clock, but added 256 bytes of RAM that could be used either as "scratchpad" RAM, or a cache. When used in cahce mode the programmer could configure it as a data or instruction cache, or both, and the internal memory controller then used it to reduce access to (slower) external memory.
Another change was the addition of an optional 16-bit data bus, which doubled the rate at which it could access memory if set up properly. Combined with the two address bus sizes this meant that the chip was offered in a total of four versions:
|part #||# of pins||data bus||address bus|
The Z800 was, in most ways, a "super Z80" that would run existing programs at considerably higher speeds. However this same compatibility appears to have doomed it, as the existing Z80 was "good enough" for those still using it in the mid-80's, and those needing more power could easily use one of the existing 32-bit designs coming on the market.
Hitachi also produced a similar design known as the Hitachi HD64180. This version seems to have fared somewhat better.