- (a) is the output of a linear shift register, and
- (b) has the property that, if the shift register is set to any nonzero state and then cycled, a pseudorandom binary sequence of a maximum of
*n*= 2-1 bits will be generated, where^{m}*m*is the number of stages,*i.e.*, the number of bit positions in the register, before the shift register returns to its original state and the*n*-bit output sequence repeats.

Source: from Federal Standard 1037C